#ifndef __DEVICE_H__
#define __DEVICE_H__

#ifdef __cplusplus
extern "C" {
#endif

//
// Included Files
//
#include "driverlib.h"

#if (!defined(__CORE0__) && !defined(__CORE1__))
#error "You must define __CORE0__ or __CORE1__ in your project properties.  Otherwise, \
the offsets in your header files will be inaccurate."
#endif

#if (defined(__CORE0__) && defined(__CORE1__))
#error "You have defined both __CORE0__ and __CORE1__ in your project properties.  Only \
a single CPU should be defined."
#endif

//*****************************************************************************
//
// Defines related to clock configuration
//
//*****************************************************************************

//
// To use INTOSC as the clock source, comment the #define USE_PLL_SRC_XTAL,
// and uncomment the #define USE_PLL_SRC_INTOSC

// #define USE_PLL_SRC_XTAL_10M
// #define USE_PLL_SRC_XTAL
#define USE_PLL_SRC_INTOSC

#if defined(USE_PLL_SRC_XTAL)
//
// 25MHz XTAL on controlCARD is used as the PLL source.
// For use with SysCtl_getClock().
//
#define DEVICE_OSCSRC_FREQ 25000000U

//
// Define to pass to SysCtl_setClock(). Will configure the clock as follows:
// PLLSYSCLK = 25MHz (XTAL_OSC) * 64 (IMULT) / (2 (REFDIV) * 4 (ODIV) * 1(SYSDIV))
// WARNING: ODIV need >= 2
#define DEVICE_SETCLOCK_CFG                                                                       \
    (SYSCTL_OSCSRC_XTAL | SYSCTL_IMULT(64) | SYSCTL_REFDIV(2) | SYSCTL_ODIV(4) | SYSCTL_SYSDIV(1) \
        | SYSCTL_PLL_ENABLE | SYSCTL_DCC_BASE_0)

//
// 200MHz SYSCLK frequency based on the above DEVICE_SETCLOCK_CFG. Update the
// code below if a different clock configuration is used!
//
#define DEVICE_SYSCLK_FREQ ((DEVICE_OSCSRC_FREQ * 64) / (2 * 4 * 1))

#elif defined(USE_PLL_SRC_XTAL_10M)
//
// 10MHz XTAL on controlCARD is used as the PLL source.
// For use with SysCtl_getClock().
//
#define DEVICE_OSCSRC_FREQ 10000000U

//
// Define to pass to SysCtl_setClock(). Will configure the clock as follows: SYSCTL_OSCSRC_OSC2 SYSCTL_OSCSRC_XTAL
// PLLSYSCLK = 10MHz (XTAL_OSC) * 40 (IMULT) / (1 (REFDIV) * 2 (ODIV) * 1(SYSDIV))
//
#define DEVICE_SETCLOCK_CFG                                                                       \
    (SYSCTL_OSCSRC_XTAL | SYSCTL_IMULT(40) | SYSCTL_REFDIV(1) | SYSCTL_ODIV(2) | SYSCTL_SYSDIV(1) \
        | SYSCTL_PLL_ENABLE | SYSCTL_DCC_BASE_0)

//
// 200MHz SYSCLK frequency based on the above DEVICE_SETCLOCK_CFG. Update the
// code below if a different clock configuration is used!
//
#define DEVICE_SYSCLK_FREQ ((DEVICE_OSCSRC_FREQ * 40) / (1 * 2 * 1))

#elif defined(USE_PLL_SRC_INTOSC)
//
// 10MHz INTOSC on the device is used as the PLL source.
// For use with SysCtl_getClock().
//
#define DEVICE_OSCSRC_FREQ 10000000U

//
// Define to pass to SysCtl_setClock(). Will configure the clock as follows:
// PLLSYSCLK = 10MHz (INT_OSCx) * 40 (IMULT) / ( 1 (REFDIV) * 2 (ODIV) * 1(SYSDIV))
//
#define DEVICE_SETCLOCK_CFG                                                                       \
    (SYSCTL_OSCSRC_OSC2 | SYSCTL_IMULT(40) | SYSCTL_REFDIV(1) | SYSCTL_ODIV(2) | SYSCTL_SYSDIV(1) \
        | SYSCTL_PLL_ENABLE | SYSCTL_DCC_BASE_0)

//
// 100MHz SYSCLK frequency based on the above DEVICE_SETCLOCK_CFG. Update the
// code below if a different clock configuration is used!
//
#define DEVICE_SYSCLK_FREQ ((DEVICE_OSCSRC_FREQ * 40) / (1 * 2 * 1))
#endif

//
// 50MHz LSPCLK frequency based on the above DEVICE_SYSCLK_FREQ and a default
// low speed peripheral clock divider of 4. Update the code below if a
// different LSPCLK divider is used!
//
#define DEVICE_LSPCLK_FREQ (DEVICE_SYSCLK_FREQ / 1)

//*****************************************************************************
//
// Macro to call SysCtl_delay() to achieve a delay in microseconds. The macro
// will convert the desired delay in microseconds to the count value expected
// by the function. \b x is the number of microseconds to delay.
//
//*****************************************************************************
#define DEVICE_DELAY_US(x) \
    qx_precise_delay(      \
        ((((long double)(x)) / (1000000.0L / (long double)DEVICE_SYSCLK_FREQ)) - 8.0L) / 8.0L)

//
//  Defines for setting FSI clock speeds
//
#define FSI_PRESCALE_50MHZ 2U
#define FSI_PRESCALE_25MHZ 4U
#define FSI_PRESCALE_10MHZ 10U
#define FSI_PRESCALE_5MHZ  20U

//*****************************************************************************
//
// Macros related to booting CPU2. These can be used while invoking the
// function Device_bootCPU2()
//
//*****************************************************************************
#ifdef __CORE0__
#define BOOT_KEY 0x5A000000UL

#define BOOTMODE_BOOT_TO_FLASH_BANK0_SECTOR0        0x03U
#define BOOTMODE_BOOT_TO_FLASH_BANK0_SECTOR127_END  0x23U
#define BOOTMODE_BOOT_TO_FLASH_BANK1_SECTOR0        0x43U
#define BOOTMODE_BOOT_TO_FLASH_BANK2_SECTOR0        0x63U
#define BOOTMODE_BOOT_TO_FLASH_BANK3_SECTOR0        0x83U
#define BOOTMODE_BOOT_TO_FLASH_BANK4_SECTOR0        0xA3U
#define BOOTMODE_BOOT_TO_FLASH_BANK4_SECTOR127_END  0xC3U
#define BOOTMODE_BOOT_TO_SECURE_FLASH_BANK0_SECTOR0 0x0AU
#define BOOTMODE_BOOT_TO_SECURE_FLASH_BANK1_SECTOR0 0x4AU
#define BOOTMODE_BOOT_TO_SECURE_FLASH_BANK2_SECTOR0 0x6AU
#define BOOTMODE_BOOT_TO_SECURE_FLASH_BANK3_SECTOR0 0x8AU
#define BOOTMODE_BOOT_TO_SECURE_FLASH_BANK4_SECTOR0 0xAAU
#define BOOTMODE_IPC_MSGRAM_COPY_BOOT_TO_M1RAM      0x01U
#define BOOTMODE_BOOT_TO_M0RAM                      0x05U
#define BOOTMODE_BOOT_TO_FWU_FLASH                  0x0BU
#define BOOTMODE_BOOT_TO_FWU_FLASH_ALT1             0x2BU
#define BOOTMODE_BOOT_TO_FWU_FLASH_ALT2             0x4BU
#define BOOTMODE_BOOT_TO_FWU_FLASH_ALT3             0x6BU

#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_100W  0x10000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_200W  0x20000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_300W  0x30000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_400W  0x40000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_500W  0x50000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_600W  0x60000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_700W  0x70000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_800W  0x80000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_900W  0x90000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_1000W 0xA0000U
#endif

//*****************************************************************************
//
// Defines, Globals, and Header Includes related to Flash Support
//
//*****************************************************************************
#ifdef _FLASH
#include <stddef.h>

#ifndef CMDTOOL
extern uint16_t RamfuncsLoadStart;
extern uint16_t RamfuncsLoadEnd;
extern uint16_t RamfuncsLoadSize;
extern uint16_t RamfuncsRunStart;
extern uint16_t RamfuncsRunEnd;
extern uint16_t RamfuncsRunSize;
#endif

#endif

#define DEVICE_FLASH_WAITSTATES 4

//*****************************************************************************
//
// Function Prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup device_api
//! @{
//
//*****************************************************************************

//*****************************************************************************
//
//! @brief Function to initialize the device. Primarily initializes system
//!  control to aknown state by disabling the watchdog, setting up the
//!  SYSCLKOUT frequency, and enabling the clocks to the peripherals.
//!
//! \param None.
//! \return None.
//
//*****************************************************************************
extern void Device_init(void);

//*****************************************************************************
//
//! @brief Function to boot CPU2.
//!
//! \param bootmode is the mode in which CPU2 should boot.
//!
//! Available bootmodes :
//!   -  BOOTMODE_BOOT_TO_FLASH_BANK0_SECTOR0
//!   -  BOOTMODE_BOOT_TO_FLASH_BANK0_SECTOR127_END
//!   -  BOOTMODE_BOOT_TO_FLASH_BANK1_SECTOR0
//!   -  BOOTMODE_BOOT_TO_FLASH_BANK2_SECTOR0
//!   -  BOOTMODE_BOOT_TO_FLASH_BANK3_SECTOR0
//!   -  BOOTMODE_BOOT_TO_FLASH_BANK4_SECTOR0
//!   -  BOOTMODE_BOOT_TO_FLASH_BANK4_SECTOR127_END
//!   -  BOOTMODE_BOOT_TO_SECURE_FLASH_BANK0_SECTOR0
//!   -  BOOTMODE_BOOT_TO_SECURE_FLASH_BANK1_SECTOR0
//!   -  BOOTMODE_BOOT_TO_SECURE_FLASH_BANK2_SECTOR0
//!   -  BOOTMODE_BOOT_TO_SECURE_FLASH_BANK3_SECTOR0
//!   -  BOOTMODE_BOOT_TO_SECURE_FLASH_BANK4_SECTOR0
//!   -  BOOTMODE_IPC_MSGRAM_COPY_BOOT_TO_M1RAM
//!   -  BOOTMODE_BOOT_TO_M0RAM
//!   -  BOOTMODE_BOOT_TO_FWU_FLASH
//!   -  BOOTMODE_BOOT_TO_FWU_FLASH_ALT1
//!   -  BOOTMODE_BOOT_TO_FWU_FLASH_ALT2
//!   -  BOOTMODE_BOOT_TO_FWU_FLASH_ALT3
//!
//! Note that while using BOOTMODE_IPC_MSGRAM_COPY_BOOT_TO_M1RAM,
//! BOOTMODE_IPC_MSGRAM_COPY_LENGTH_xxxW must be ORed with the bootmode parameter
//!
//! This function must be called after Device_init function
//! \return None.
//
//*****************************************************************************
extern void Device_bootCPU2(uint32_t bootmode);

//*****************************************************************************
//
//!
//! @brief Function to verify the XTAL frequency
//! \param freq is the XTAL frequency in MHz
//! \return The function return true if the the actual XTAL frequency matches with the
//! input value
//
//*****************************************************************************
extern bool Device_verifyXTAL(float freq);

//*****************************************************************************
//!
//!
//! @brief Function to turn on all peripherals, enabling reads and writes to the
//! peripherals' registers.
//!
//! Note that to reduce power, unused peripherals should be disabled.
//!
//! @param None
//! @return None
//
//*****************************************************************************
extern void Device_enableAllPeripherals(void);
//*****************************************************************************
//!
//!
//! @brief Function to disable pin locks on GPIOs.
//!
//! @param None
//! @return None
//
//*****************************************************************************
extern void Device_initGPIO(void);

//*****************************************************************************
//!
//! @brief Error handling function to be called when an ASSERT is violated
//!
//! @param *filename File name in which the error has occurred
//! @param line Line number within the file
//! @return None
//
//*****************************************************************************
extern void __error__(const char *filename, uint32_t line);

//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************

#ifdef __cplusplus
}
#endif

#endif // __DEVICE_H__
